Nvidia is deploying its in-house Vera CPU in semiconductor design processes to accelerate development of next-generation chips. The company said it worked with Cadence and Synopsys to optimise core electronic design automation applications. As chip design grows more complex, key EDA workloads such as logic simulation and formal verification still rely heavily on CPU performance. In tests, Cadence Jasper and Synopsys VCS delivered up to 1.5 times higher performance on some workloads with the same core count.

Samsung Electronics said it is expanding cooperation with domestic and overseas partners to broaden the AI semiconductor ecosystem. It held SAFE Forum 2026 in Seoul and presented its next-generation foundry technology strategy and plans to expand ecosystem cooperation. About 400 people attended, with 21 partners showcasing solutions. Samsung also unveiled a DTCO strategy, a next-generation 2 nm process and plans to strengthen SRAM competitiveness, while joining initiatives such as M.AX and K-CHIPS.