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Industry

Samsung Electronics bets on zHBM by stacking memory on accelerators

Samsung Electronics is preparing a two-track strategy of conventional HBM5 and its zHBM concept as it seeks to regain leadership in high-bandwidth memory. The company is shifting to a design that stacks HBM directly on top of AI accelerators, removing the interposer that links logic and memory side-by-side. Samsung targets 230 percent higher bandwidth and 70 percent lower power than HBM4E. Commercialisation will hinge on heat management and wafer hybrid-bonding yields.

AI & Enterprise

LG to hold \'LG Spark 2026\' in Magok, unveil new Physical AI and AIDC technologies

LG will hold \'LG Spark 2026\' at LG Sciencepark in Magok, Seoul, from Sept. 7 to 17, it said on Thursday. The event will run five programs focused on spreading AI innovation and transformation cases. LG will showcase 41 new R&D technologies, including Physical AI, AIDC and mobility. It will also present 68 AX cases, share Exaone applications and plans, hold a developer conference with global firms, and run mentoring and experience programs for students.

Industry

AMAT says AI chip performance hinges on data movement, solution is 3D scaling

Applied Materials says efficiency in moving data, rather than computing speed, is the main bottleneck for AI semiconductor performance and that the industry solution is 3D scaling. It described 3D scaling across logic, memory and packaging, and said capacity expansion should accompany demand. The company detailed approaches for DRAM, a shift in HBM stacking from micro-bumps to hybrid bonding, and panel interposer development, while highlighting cooperation with Samsung Electronics and SK Hynix in Korea.