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Rambus has rolled out a new solution to address AI memory bottlenecks, SiliconANGLE reported on Tuesday.

Rambus announced an HBM4E memory controller IP to support memory bandwidth needs for next-generation AI accelerators, GPUs and high-performance computing systems.

HBM4E is a high-bandwidth memory stack that vertically stacks DRAM dies and connects them using through-silicon vias (TSVs). It provides high memory bandwidth and low latency in AI and high-performance computing environments. Rambus' new controller supports 16 Gb/s per pin and delivers up to 4.1 TB/s of memory bandwidth per HBM4E device.

In an AI accelerator environment built with eight stacks, total memory bandwidth can exceed 32 TB/s, the company said, calling it optimized for large-model training, inference and data-intensive computing.

Keyword

#Rambus #SiliconANGLE #HBM4E #GPU #TSV
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