Huawei has set a goal of developing advanced chips at a 1.4 nanometre process level by 2031. Bloomberg News reported on May 25 that Huawei said at a Shanghai semiconductor symposium it aims to make industry-leading semiconductors within the next five years, but did not provide independent performance data to support that.

Huawei also unveiled a new chip design principle it calls the Tau Scaling Law. Instead of continuing to shrink transistors, the approach seeks to boost performance by reducing the time it takes for signals and data to move inside chips and computing systems. Huawei sees limits to performance improvements based solely on Moore's Law, which the semiconductor industry has relied on, as transistors shrink to the atomic scale.

Bloomberg News reported that such goals are a major challenge compared with China's current semiconductor manufacturing capabilities.

The market generally views China's most advanced semiconductor manufacturing capability as being at the 7 nanometre level. By contrast, TSMC, the world's largest advanced chipmaker, is currently using 2 nanometre manufacturing technology and plans mass production using a 1.4 nanometre process in 2028. U.S. export controls have limited Chinese companies' access to advanced lithography equipment and core semiconductor technologies, leading to assessments that it is difficult to reach the leading edge using existing manufacturing methods alone.

Huawei plans to apply a 'logic folding' architecture for the first time to a Kirin smartphone chip it will launch later this year. Huawei explained that logic folding can significantly improve performance by reducing internal chip wiring. It said it will apply the approach by 2030 to Ascend chips and to large AI clusters made up of hundreds to thousands of chips. It added that over the past six years it has designed and mass-produced 381 chips based on the Tau Scaling Law.