Search results for memory controller
Industry
ASICland posts 1.4 billion won Q3 operating profit, turns profitable year on year
ASIC design solutions firm ASICland said it posted consolidated third-quarter revenue of 48.3 billion won and operating profit of 1.4 billion won. Revenue jumped 199 percent from a year earlier and operating results swung from a 4.5 billion won loss. The company recorded a quarterly net loss of 3.0 billion won, citing foreign exchange losses. Development and mass-production sales both rose, with product sales expanding sharply.
Industry
Samsung Electronics bets on zHBM by stacking memory on accelerators
Samsung Electronics is preparing a two-track strategy of conventional HBM5 and its zHBM concept as it seeks to regain leadership in high-bandwidth memory. The company is shifting to a design that stacks HBM directly on top of AI accelerators, removing the interposer that links logic and memory side-by-side. Samsung targets 230 percent higher bandwidth and 70 percent lower power than HBM4E. Commercialisation will hinge on heat management and wafer hybrid-bonding yields.
Industry
Nvidia unveils NVHBM to design HBM controller in-house
Nvidia will bring high-bandwidth memory control circuitry into its own design with NVHBM, adding the technology to its NVLink Fusion interconnect, it said on Aug. 26. The company said it will set a standard implementation and have major memory partners validate and supply it. Nvidia said integrating a custom controller into the HBM base die can boost bandwidth up to 30 percent and cut HBM power use 15 percent, while freeing up to 25 percent die area on the XPU.
-
Industry
Memory big two near HBM4E race as mass production timing becomes key battleground
-
Telecommunications & Media
Apple rounds up new products from iPhone 17e to MacBook Neo, Studio Display
-
Telecommunications & Media
Apple steps up aggressive pricing as memory costs surge
-
Industry
Rambus unveils HBM4E controller IP to ease AI memory bottlenecks
-
AI & Enterprise
Apple unveils M5 Pro and M5 Max chips, breaks performance limits